Further Information

Datasheet(PDF)

Model 305

Sketchboard PMC

Reconfigurable Logic and I/O

Datasheet (PDF)

Xilinx Virtex-II XC2V3000 to XC2V8000

Six Banks of 256k/512k x 36 SRAM

Programmable Clock Generator

Interchangeable Front Panel I/O Modules

Wide Selection of I/O Connector Options

DMA Engine FPGA Function Included

Verilog/VHDL Interface Source Code

User Defined P4 Connector I/O Available

PCI Bus Master With Auto DMA Features

32/64-bit and 33/66 MHz PCI Support

Industry Standard PMC Form Factor

Windows / Linux / VxWorks Drivers