Model 331

  

Channel Accelerator

Plus

 

FPGA Configurable Dual Channel Receiver

Datasheet (PDF)

  

Available in PMC/PCI/CPCI form factors

Dual 16-bit A/D Converters
Xilinx Virtex-4 LX or SX FPGA
32 Mbytes of QDR SRAM in four banks
40 to 130 MHz sample clock frequency
On-board fixed frequency synthesizer
FPGA core library for data interfaces
Bus master with scatter-gather DMA
PCI-X (133MHz) and legacy PCI support
Windows, Linux, VxWorks drivers & API
Reference design with source code